// Copyright 2010-2016 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#ifndef _SOC_BB_REG_H_
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#define _SOC_BB_REG_H_
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/* Some of the baseband control registers.
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* PU/PD fields defined here are used in sleep related functions.
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*/
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#define BBPD_CTRL (DR_REG_BB_BASE + 0x0054)
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#define BB_FFT_FORCE_PU (BIT(3))
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#define BB_FFT_FORCE_PU_M (BIT(3))
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#define BB_FFT_FORCE_PU_V 1
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#define BB_FFT_FORCE_PU_S 3
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#define BB_FFT_FORCE_PD (BIT(2))
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#define BB_FFT_FORCE_PD_M (BIT(2))
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#define BB_FFT_FORCE_PD_V 1
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#define BB_FFT_FORCE_PD_S 2
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#define BB_DC_EST_FORCE_PU (BIT(1))
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#define BB_DC_EST_FORCE_PU_M (BIT(1))
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#define BB_DC_EST_FORCE_PU_V 1
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#define BB_DC_EST_FORCE_PU_S 1
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#define BB_DC_EST_FORCE_PD (BIT(0))
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#define BB_DC_EST_FORCE_PD_M (BIT(0))
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#define BB_DC_EST_FORCE_PD_V 1
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#define BB_DC_EST_FORCE_PD_S 0
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#endif /* _SOC_BB_REG_H_ */
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